1. Field of the Invention
The present invention relates generally to an attenuator circuit and more particularly to a bridged-tee bandwidth compensated attenuator circuit having a reference state and an attenuation state which includes switches, for example, field effect transistors (FETs), that are configured so as to provide frequency response tracking in both states resulting in the overall bit attenuation .DELTA.A being relatively frequency invariant over a relatively broad range of frequencies.
2. Description of the Prior Art
Many monolithic microwave integrated circuit (MMIC) applications are known in which relatively fine levels of switched attenuation are required over relatively wide bandwidths. Binary weighted attenuators connected in cascade, for example, as illustrated in FIG. 1A, provide 2.sup.N levels of attenuation for signal amplitude control. When such binary weighted attenuators are used in conjunction with phase shifters and signal splitters, such circuits can be used for variable amplitude and phase (VAP) shift networks as generally shown in FIG. 1B. For such binary weighted attenuators, the finer the level of attenuation for the smallest bit, the greater the number of binary weighted attenuator bits that can be cascaded, resulting in a higher number of attenuation levels 2.sup.N, wherein N is the number of binary weighted bits in the circuit.
Such attenuator bits are known to have an attenuation state and a reference or "thru" state. The state of the binary weighted attenuator bit is controlled by the control lines A.sub.n, B.sub.n for each binary weighted attenuator bit. The logic states for the control lines for each of the attenuators, A.sub.n and B.sub.n, are illustrated in FIG. 1C. With such switched attenuator bits, it is not only important to accurately control the attenuation, but also to minimize the phase variation between the attenuation and reference states over a relatively wide bandwidth. However, with known switched binary weighted attenuator circuits, it is relatively difficult at microwave frequencies to make the overall bit attenuation .DELTA.A and phase variation frequency invariant primarily due to the parasitic off state capacitance of the FET switches used in such circuits. For example, referring to FIG. 2A, a bridged-tee switched attenuator bit circuit is shown. The attenuator includes a first FET, S.sub.1, whose gate is controlled by a control line A. The circuit also includes a second FET, S.sub.2, whose gate is coupled to a control line B. The equivalent circuits in the attenuation state and reference state are shown in FIGS. 2B and 2C respectively. As shown by the truth table in FIG. 1C, in an attenuation state, the control line A and hence, the switch S.sub.1 is off while the control line B is on causing the switch S.sub.2 to be on. The equivalent circuit for such a state is illustrated in FIG. 2B. As shown in FIG. 2B, the circuit response is frequency independent and consists of the resistor R.sub.2a in parallel with the series combination of the resistor R.sub.2b plus the drain to source "on" resistance R.sub.DS(S2) of the switch S.sub.2. However, as shown in FIG. 2C, in the reference state, the equivalent circuit is frequency dependent due to the off state capacitance of the switch S.sub.2. In the reference state, the logic state of the control line A is on, while the logic state of the control line B is off. Thus, as shown, in FIG. 2C, a resistance R.sub.1 is in parallel with the drain to source "on" resistance R.sub.DS(S1) of the switch S.sub.1. However, the off state capacitance C.sub.S2 of switch S.sub.2 forces the circuit to be frequency dependent in this state thereby forcing the overall attenuation, .DELTA.A, to be frequency dependent.
The overall attenuation, .DELTA.A, is the difference in attenuation between the attenuation state, A.sub.att, and the reference state, A.sub.ref, as generally given the equation; .DELTA.A (dB)=A.sub.att (dB)-A.sub.ref (dB). Since the attenuation in the reference state A.sub.ref includes the off state capacitance of the switch S.sub.2, the overall attenuation .DELTA.A is frequency dependent, as generally shown in FIG. 2D, which illustrates the attenuation as a function of frequency, for a -0.3 dB attenuator example. The curve 20 represents the attenuation in the attenuation state A.sub.att, while the curve 22 represents the attenuation in the reference state A.sub.ref. As shown, the attenuation in the reference state A.sub.ref, varies as a function of frequency. Since the overall attenuation .DELTA.A, as represented by the curve 24, is merely the difference between the curves 20 and 22, .DELTA.A varies as a function of frequency as well. Although, in most microwave designs using FET switches, the off state capacitance is generally quite small, it is, however, coupled in series with a relatively large resistance R.sub.2b (i.e. R.sub.2b =1.3 k for .DELTA.A=0.3 db). Thus, as frequency increases, the desired resistance R.sub.2a is shunted by an impedance which may be comparable in value at higher frequencies resulting in an increase in reference state attenuation. In the attenuation state, the switch S.sub.2 is "on" and presents no problems other than a relatively small and generally negligible "on" resistance, thus resulting in broad band performance for this state. Unfortunately, the difference between the two states, the overall attenuation .DELTA.A, will follow the frequency dependence of the reference state as illustrated by the curve 24 in FIG. 2D.
Further complicating matters, as illustrated in FIG. 2E, the attenuation errors are larger for smaller bit attenuation levels. This is because the smaller attenuation bits have larger resistance R.sub.2b causing the bandwidth limiting effect to occur at lower frequencies.